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Engineer Design

Location:
Kochi, KL, India
Salary:
25000
Posted:
July 28, 2014

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Resume:

CURRICULUM VITAE

VISHNU.V.GOPI

: +91-949******* Varikattu (H)

Mobile

Land Phone : 048**-******

Pasuppara P O

: ace4t8@r.postjobfree.com

E-mail

Elappra, Idukki

Kerala, PIN:685501

CAREER OBJECTIVE

Looking for a better position that will build on my skill and provide scope for upward

movement. To be part of an organization which offers a challenging and a growth -oriented work

environment and helps me put my education and abilities to its maximum use.

POSITIVE SKILLS:

Excellent commitment, Confidence to face challenges, dedication and planning towards goal

oriented tasks.

Good interpersonal skills, Friendly nature and ability to work well as a part of a t eam

EDUCATION CREDENTIALS:

M.Tech in Electronics with specialization in VLSI & Embedded Systems at Toc H institute

of science and Technology, Arakunnam, Eranakulam from CUSAT University, Kerala.

B.Tech in Electronics and communication Engineering at MBCCET,Peermade Idukki

from M.G University, Kottayam, Kerala in 2012 with 68 %.

Poly Diploma in Electronics Engineering at GOV. POLY TECHNICAL COLLEGE Muttom,

Thodupuzha from Board of Technical Education, Kerala in 2008 with 63.3%

THSSLC in Electronics at Gov. Technical High School, Pala, Kottayam from Board of

Technical Education, Kerala in 2005 with 80.3%.

TECHNICAL SKILLS:

VHDL, Verilog

Professional skill

Schematic/Symbol design and its simulation

Basics of Cadence and its layout design (Attended short

term cadence workshop), 8051 programming in

assembly & embedded C codes.

Modelsim

Tools used

Quartus II

Xilinx ISE

Cadence Virtuso

Pspice,

OR-CAD schematic

UNCLE

Kits Used

Spartan 3

Cyclon III

PROJECTS DONE :

M.Tech - Clock-less design Methodology for Digital system design

done at VSSC (ISRO) Thiruvanathapuram.

As design systems grew in complexity and clock speeds constantly increasing, several

limitations to the conceptual framework of synchronous design are noticed. A few of the notable

problems due to higher performance demand are difficulty in global distribution of clock, clock skew,

high power dissipation, interfacing difficulties and traversing the chip’s longest wire in one clock cycle.

It is therefore not a surprise that the area of asynchronous circuits and systems, which generally do

not suffer from these problems, are gaining importance.

Asynchronous digital design is a new research concept that improves digital system

implementations. Asynchronous systems can be realized using clock-less chip implementation

techniques that avoids the clock. Such system gives importance to the arrival of data and sequence,

only when required, thus reducing power consumption, EMI etc. The proposed methodology ensures

the validity of the data by taking care of glitches, delays and hazards.

The design of a new methodology for Clock-less system is development in this project. The

present clock-less design methodologies (like Globally Asynchronous Locally Synchronous (GALS) &

Bundled Data Transfer) does not fully solve the problems of conventional synchronous designs. In

order to overcome these drawbacks, I propose a new design methodology of full Clock-less digital

system design. The proposed methodology overcomes the above effects in addition to optimization. In

this project work Modified Booth Algorithm is implement ed with the new methodology and its

comparison with synchronous system is also verified. In the modern processors Modified Booth

Algorithm is used to reduce complexity of multiplication.

B-tech - CAN PROTOCOL based car automation using 89C51

done at NIELIT(DOEACC) Calicut.

The Controller Area Network (CAN) protocol, developed by ROBERT BOSCH, offers a

comprehensive solution to managing communication between multipl e Controllers. CAN is a Carrier

Sense Multiple Access by Collision Detection using Arbitration protocol. The protocol has found wide

acceptance in automotive (vehicle) applications due to its high speed (1 Mbps), low cost, high

performance, and availability of various CAN protocol implementation. In vehicle networking, CAN

protocol satisfy unique requirements not present in other networking protocols including high level of

error detection, low latency times and configuration flexibility.

The project aims at implementing CAN protocol for the automation of car (three

applications) using two nodes .One nodes are kept as transmitters and one as receiver. The data

entered through the Automation set-up is transmitted (broadcast) from the transmitter, carried by the

CAN cable, received by the receiver and send the received data to the Automation set-up for

controlling. Due to the lack of availability of CAN controller, here we are using 89C51 and MAX 232

for serial communication.

Poly Diploma - Computer Assembling & Basic LAN networking.

AREA OF INTEREST:

Asynchronous Digital system design

ASIC design

Teaching

Embedded systems

TECHNICAL EXPERIENCE :

1 year experience at Flight computers division/Avionics, Vikram Sarabhai Space Centre

(ISRO), Thrivanthapuram, as a Project Internship trainee in the area of digital system

development under the guidance of Mr. Padmakumar K, Scientist/ Engineer SF.

2 months experience at NIELIT(Doeacc), Calicut, as a project trainee in the area of

Microcontroller programming.

TECHNICAL PAPER PUBLISHED :

Paper Title : Clock Less Design Methodology for Digital System Design

Published in : Library, Vikram Sarabhai Space Centre, ISRO, Trivandrum

Paper Title : Clock Less Design Methodology for Digital System Design

Published in : International Journal of Advanced research in Electrical,

Electronics and Instrumentation Engineering (IJAREEIE)

Paper Title : Asynchronous Pipelined 32-bit Booth multiplier (under review)

PERSONAL DETAILS:

: V. V. Gopi

Occupation of Father : Rtd.Teacher

Father’s Name

: 04 April 1990

: Single

Date of Birth

: English, Malayalam, Tamil

Marital Status

: Indian

Languages

: Driving, Listening to Music & Browsing

Nationality

Hobbies

REFERENCE NUMBERS:

1) Mr. U. Nandakumar

Scientist/ Engineer SE

Vikram Sarabhai Space Centre, ISRO, Trivandrum

Email-id: ace4t8@r.postjobfree.com

2) Mr. Padmakumar K

Scientist/ Engineer SF

Vikram Sarabhai Space Centre, ISRO, Trivandrum

Email-id: ace4t8@r.postjobfree.com

3) Asso. Prof. Sudheesh Madthavan

Toc H Institue of Science and Technology,Eranakulam

Mob: 964-***-****

Email-id: ace4t8@r.postjobfree.com

I hereby declare that the above statements are true to the

best of my knowledge.

Place: Elappara

Date : 20-07-2014

[Vishnu V Gopi]



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