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Project Engineer

Location:
Bangalore, KA, India
Salary:
negotiable
Posted:
July 20, 2014

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Resume:

PRAKASH.V VLSI Trained

Engineer

TECHNICAL SKILLS

Electronic Design Xilinx ISE 14.2, QuestaSim10.2d, Leonardo Spectrum.

Packages

Programming Languages C, Verilog, System Verilog, Java.

Microcontrollers / FPGA 8051, Spartan6, Spartan3e.

Familiar Protocols PCIe, Round Robin Arbitor.

Familiar OS Windows, Linux.

PROJECT WORK

1. Round Robin Arbitor(4x4)

Description: The aim of this project is to design, verification and implementation of a

four request four grant round robin arbitor which gives least priority to the slave

whose request is granted recently. Design using Verilog HDL and Verification using

System verilog.

Software Tools: Questasim10.2d, Xilinx ISE14.2.

Hardware: Spartan 6 fpga.

2. VGA Controller

Description: The aim of this project is to design and implement VGA Controller

which can generate the Control Signals according to standard VGA timings to print

Vertical 8 color spectrum on monitor screen of 640x480 pixcels. Project verification

is using verilog.

Software Tools: Xilinx ISE12.2.

Hardware: Spartan 3E FPGA starter kit.

PROFESSIONAL COURSES

I Completed Professional Development Course, in VLSI Design and Verification

from Sandeepani School of VLSI Design.

EDUCATION

Name of University/Board Specialization Year Aggregate

Degree P

a

ss

O

u

t

B.Tech JNTU, Anantapur Electronics 2012 70.32

and

Comm

.

12th Intermediate State Science 2008 95.8

board, Mathe

A.P. matics

10th Board of Secondary All 2006 83.2

education, A.P.

PERSONAL DETAILS

ℑ Father’s Name Lakshminarayana.V

ℑ D.O.B 06, January, 1991.

ℑ Current Address #3/22, CV Raman Nagar, Bangalore.

ℑ Email ID ace1bu@r.postjobfree.com

ℑ Contact No 088********

DECLARATION

I do here by declare that all the above statements are true to the best of my knowledge

and belief.

Date:-

Place – Bangalore. Signature of the

Candidate



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