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Engineer Project

Location:
Mumbai, MH, 400078, India
Salary:
2.50 lacs
Posted:
April 23, 2014

Contact this candidate

Resume:

PANKAJ KUMAR

E Mail: acdti6@r.postjobfree.com Navin PG, H. No.: 47, Munnekolala

Mobile: 959******* Marathalli, Bangalore, Karnataka 560037

OBJECTIVE

To serve in an organization capable of providing me the scope for career development in the field of VLSI industry

and where, I can integrate my knowledge and analytical skills to add value to an organization.

PROFESSIONAL SUMMARY

• B.Tech in Electronics & Telecommunication Engineering from Dr. MGR University, TamilNadu with

exposure to electronics circuits, networking, digital & analog communication, chip design, embedded

system, VLSI and software programming.

• Strong communication, collaboration & interpersonal skills with proficiency in grasping new concepts

quickly and utilizing them in an effective manner.

• Executed various academic projects using technologies such as microprocessor & microcontroller,

MySQL, visual basic etc.

• Abilities in handling multiple priorities, with a bias of action and a genuine interest.

SKILLS & TOOLS KNOWLEDGE

VLSI Chip Backend Design: Full Computer Proficiency:

• •

Custom Layout, DRC, LVS, ERC. 1. Operating Systems: Windows XP, 7

8 and LINUX.

Analog Layout Techniques :

• 2. Applications: MS Office, MS

a. Matching of Devices: common centroid,

Access

interleaving.

3. Programming Languages: C,

b. Shielding.

microprocessor, and SQL.

c. Electro migration and IR Issues solutions.

d. parasitic extraction.

e. Reliability Issues like Antenna, Latch up,

and ESD.

f. Methodologies for different types of blocks;

half cell symmetry for differential amplifier.

EDA Tools: Cadence (Virtuoso),

Virtuoso XL, Stabie soft.

WORK HISTORY

Trainee Analog & Mixed signal Layout Engineer October 2012 to February 2014

ARF Design Pvt ltd Bangalore

Topics covered were:

• Basics of semiconductors devices.

• Fabrication process.

• Parasitic that needed to be considered.

• Devices and device parameters.

• Layout Design for Standard Cells.

• Layout design for Analog Circuits.

• Challenges faced in layouts.

• Recommended approaches for a good layout.

Standard Cells: Created layouts for AND, OR, NOR, AOI circuits and Flip Flops for 65nm technology. Layouts for

different drive strengths were created.

Analog Circuits:

1. Differential pair TSMC130nm, Worked on layout of diff pair did common centroid matching for diff pair.

• Did all verification check on the block (LVS/DRC).

• Tool used: Stabie soft. Cadence, virtuoso.

2. Current mirror: TSMC130nm, Worked on layout of op amp, did interdigitated for current mirror and did

cascade of current mirror.

• Did all verification check on the block (LVS/DRC) .

• Tool used: Stabie soft. Cadence, virtuoso.

3. Op amp TSMC 130nm, Worked on layout of op amp, did cc matching for input pair, and interdigitated for

current mirror and did the resistor matching.

• Did all verification check on the block (LVS/DRC).

Tool used: Stabie soft, Cadence, virtuoso.

4. Bias generator : TSMC130nm, Worked on layout of Bias generator, did interdigitated for current mirror and

place different blocks and did the top level routing for the current mirrors .

• Did all verification check on the block (LVS/DRC).

• Tool used: Stabie soft. cadence, virtuoso

EDUCATION

DR. MGR UNIVERSITY 2011 CHENNAI

B.TECH: ELECTRONICS AND TELECOMMUNICATION ENGINEERING.

Passed with first class distinction with an aggregate of 84%.

PCS PATNA 2007

PATNA, BIHAR

12TH: SCIENCE.

Passed with first class with an aggregate of 62%.

ST. PAUL HIGH SCHOOL 2004

SAMASTIPUR, BIHAR

10TH: REGULAR.

Passed with first class with an aggregate of 69%.

ACCOMPLISHMENTS

ACADEMIC PROJECT:

PROJECT DETAIL: SPREAD SPECTRUM TECHNIQUE USING FREQUENCY

HOPPING FOR SECURED COMMUNICATION.

Position: Leader.

DESCRIPTION: The objective of this project is to transform the data over a band for

secrecy would also improve the Performance of short range wireless communication by

avoiding the interference and multi path fading, This will enhance channel quality.

Here in transmitter section, we have generated PN sequence as carrier which would be

transmitted in an encrypted format by using QFSK modulation technique.

In Receiver section, we transform the time domain signal in to frequency domain signal

using FFT algorithmically decrypting the transmitted signal, we would reconstruct it by using

EX ORING with the original PN sequence.

CERTIFICATIONS

Under gone training at BSNL, Bihar on BTS, OCB, and Broad band microwave &

transmission system.

Certification course on C language from SSI, Chennai.

ACHIEVEMENTS:

Annual Day Organizing Committee Member in College.

Event Coordinator of the National Symposium 'KRITANSH'10' of Electronics &

Communication Department.

1ST Position in 100 meter race at school level.

ADDITIONAL INFORMATION

Date of Birth : 1 12 1989

Gender : male.

Nationality : Indian.

Marital Status : Unmarried.

Languages Known: English & Hindi.

Hobbies : Listening music, Net Surfing, playing cricket.

Strength : Leadership qualities, Adaptability Zeal to learn innovative ideas, Quick Learning skills.

DECLARATION:

I hereby declare that all the above furnished details are true to the best of my knowledge.

Place: Bangalore PANKAJ KUMAR



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