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Project Design Engineer

Location:
New Delhi, DL, India
Salary:
3.5
Posted:
April 06, 2014

Contact this candidate

Resume:

ANKUSH CHHIKARA

South Moti Bagh Mob- 987-***-****

New Delhi Email-

acdi2w@r.postjobfree.com

.

.

CAREER OBJECTIVE

To prove my mettle as an VLSI design engineer and to establish the company at a greater level in the

global market

SKILLS

1. Programming Languages: C & C++

[Studied C++ for two years in 11th and 12th as an subject and prepared an complete program of

BANKING SYSTEM as final project]

2. Assembly Languages: Working knowledge of microprocessor 8085 and 8086

3. Design Languages: VHDL,VERILOG and basics of System Verilog

4. Circuit Simulator: TSPICE,ORCAD

5. EDA TOOLS: Digital system/circuit design on Xilinx software (12.3).

MODELSIM(mentor graphics)

6. Analog Electronics

7. Digital Electronics

8. Computer Architecture.

9. Working knowledge of FPGA’S

QUALIFICATIONS

SCHOOL/UNIVERSIT BOARD/AFFILIATION YEAR OF PASSING PERCENTAGE/CGPA

Y

ITM UNIVERSITY AUTONOMOUS 2014 7.8 OUT OF 10 UPTO

6th SEMESTER

GURGAON,

HARYANA

K.V NO.2 DELHI CBSE 2010 82%

CANTT-10

K.V NO.2 DELHI CBSE 2008 86%

CANTT-10

SUMMER TRAINING

1. 6 WEEKS SUMMER TRAINING IN AIRCEL INDIA PVT LTD. FROM 26 JUNE TO 6 MAY

2012 in BASICS OF GSM AND NETWORKING.

2. 10 WEEKS OF SUMMER TRAINING IN EFY(ELECTRONICS FOR YOU ) FROM 15TH MAY

TO 20TH JULY IN VLSI DESIGN WHERE I LEARNT ABOUT VLSI DESIGN

FLOW,VERILOG LANGUAGE AND ITS IMPLEMENTATION,FPGA DESIGNING.

TECHNICAL PROJECTS

1. Designed a 32 bit FPU that is a math co-processor using VERILOG implementation and verified

it through MODELSIM

2. Designed an ALU using VERILOG implementation.

3. Designed an MBIST using verilog.

4. Simple frequency modulation walkie talkie as a minor project in 3 rd year.

5. Made a working model of water level indicator using ICs and ICs in 1 st year as a minor project.

6. Made a working model of theft detector in 2nd year as a minor project.

AREA’S OF INTEREST:

1. VLSI design and working on FPGA’s.

2. Working with EDA tools.

3. DIGITAL ELECTRONICS: Gaining in depth knowledge of sequential logic circuits and their

applications in different systems.

PROFFESIONAL MEMBERSHIP:

EARLIER I WAS A MEMBER OF CORPORATE INFOCOM PVT.LTD WHICH DEALS IN WEB

DESIGNING,WEB HOSTING AND HR.

DECLARATION:

I do hereby DECLARE that all the information provided above is true to the best of my knowledge and

belief.

PERSONAL DETAILS

NAME: Ankush Chhikara

7th Aug 1992

DATE OF BIRTH:

FATHER’S NAME: Dayapal Chhikara

MOTHER’S NAME: Dimpy Chhikara

CORRESPONDENCE ADDRESS: B-279 South Moti Bagh-II Nanakpura New Deilhi-110021

MOBILE: 098********

DATE: 20th April 2013 ANKUSH CHHIKARA

ANKUSH CHHIKARA

South Moti Bagh Mob- 987-***-****

New Delhi Email-

acdi2w@r.postjobfree.com

.

.

References for Ankush Chhikara

ITM UNIVERSITY, GURGAON

1. Mrs. Nidhi Kathuria

Design and verification engg.

Email -acdi2w@r.postjobfree.com

Contact- 901-***-****

2. Mr. Neeraj Shukla

Head of VLSI team

itm university, gurgaon

Email- acdi2w@r.postjobfree.com



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