Michael Y. Young

408-***-****

Cupertino, CA, *5014 acd1hu@r.postjobfree.com

http://www.linkedin.com/in/michaelyyoung

Semiconductor device characterization laboratory manager bringing people managing skill and a broad range of electrical

engineering technical expertise in state of the art nanometer scale circuit characterization. Proven track record in making

positive contributions and delivering timely result in many technology areas. Possesses innovative research and

development skills in output devices (2D color FPD displays, electric paper displays, on-demand lithographic printing,

inkjet printing, co-extrusion printing) and input devices (2D imagers, 1D color scanners, sensors), CMOS bulk &

CMOS/SOI devices, high voltage devices and solar cells. Emphasis is on overseeing engineering development projects

and budget management, IC circuit evaluation, device layout, fabrication, packaging, testing, characterization, failure

analysis and diagnostics, reliability and yield enhancement.

• Analog & digital device evaluation experience: PLL, People, budget and laboratory management skills

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ADC, DAC, Band Gap, CP, LDO, OTA, RO, CPU, Safe Laboratory Practices

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SerDes, RF evaluation, bring up board, scan chain Quality and reliability studies

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State of the art 55nm, 28nm and 20nm technology node Project management w/ MS Project

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device evaluation experience Test strategy & planning; test fixtures & tools

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Flat panel color display & sensor experience Design layout w/ L-Edit / AutoCAD tools

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RGB color scanner bar characterization Product evaluation, supply chain management

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2D chest X-ray image sensor experience ESD, high voltage, failure analysis evaluation

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RGB toner image on belt alignment sensor Electrical fault isolation, diagnostics

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SoC multi-chip module experience Hardware / software validation & debug

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Electrical / Optical test and characterization Solar cell conversion efficiency improvement

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Labview GUI & C++ programming Diag. tools: profiler,LSM,XRAY,FIB,SEM etc.

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Test strategy & planning; test fixtures & tools Metrology & material evaluation

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National Instruments PXI hardware and software Contact angle and surface energy measurements

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ATE: Agilent 4142, 4156, 4284, 4395; HP 4062B; Mechanical property evaluation: pull test, aging.

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Piezo MEMS transducers dev fab & eval

Keithley 4200, 707, 708 etc. •

Polytec LDV vibrational meas, laser micromachining

Probers: Electroglas, Cascade Microtech, Suss, •

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Nikon VMR metrology dimensional measurements

Micromanipulator, Wentworth, TCL, etc. •

IC technology integration & backend assembly

Tools: spectrum analyzer, LCR meters, logic •

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Epoxy die attach, wafer scale die attach

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analyzer, network analyzer, etc.

TAB bonding, flip chip, bumping, plating

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Transistor & TFT device evaluation

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CMOS device processing and fabrication

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SPICE circuit simulation; device physics

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Work in a clean room environment

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RF device evaluation & printing

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Technology road map and trend studies

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RF impedance matching & optimization

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Technology infrastructure innovations

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Signal Integrity Optimization

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EXPERIENCE

SuVolta Inc., Los Gatos, CA 2012-2014

Semiconductor Device Characterization Laboratory Manager

SuVolta, Inc. develops and licenses CMOS semiconductor technologies that significantly reduce the power consumption

of integrated circuits (ICs). SuVolta develops and licenses its technology to semiconductor companies worldwide.

• Managed a device characterization laboratory to enable the successful evaluation and characterization of state of the art

55nm, 28nm and 20nm technology node IC design circuits that demonstrated the power consumption savings and

device performance superiority in using SuVolta’s advanced DDC semiconductor technology.

• Worked with PLL clock speeds to ~ 2 GHz, SerDes speed to > 10 GHz, CPU speeds to ~ 450 MHz.

• Familiarity with state of the art low threshold voltage transistor characterization and body bias optimization.

• Extensive analog & digital device evaluation experience including PLL, ADC, DAC, Band Gap, CP, LDO, body bias

generators, OTA, RO, CPU, SerDes, RF evaluation and bring up boards.

• CMOS Deeply Depleted Channel (DDC) vs. Baseline technology evaluation and comparison.

Michael Y. Young acd1hu@r.postjobfree.com 1

• Managed skilled engineers, tasks and budgets to accomplish company goal.

• Significantly improved device evaluation and characterization capability, effectiveness and work efficiency of the lab.

• Ensured a safe and functional operating laboratory environment.

Palo Alto Research Center Inc., Palo Alto, CA 1981-2012

R&D center, a wholly owned subsidiary of Xerox Corp. and formerly, Xerox PARC

Senior Member of Research Staff, Hardware Systems Laboratory, 2005 – 2012

Worked on various printing and imaging research programs and conceived new intellectual properties. Focused on test

and characterization, device design and fabrication and material evaluation and improvement.

Conceived and implemented an electrical test methodology to successfully evaluate 2D Printed Organic Electronics

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(POE) 450 x 450 pixel, 75 dpi, 8 inch square X-ray detector / imager backplanes as part of a NIST funded project.

This enabled full functionality check and produced known good backplanes. Commercial ATE prober fixture with a

vision monitoring system, Keithley switching matrix, data acquisition instrumentation, Agilent LCR meter, Agilent

parametric curve tracer was used with this work.

Designed, fabricated, packaged and evaluated a novel solid state charging device (using HV & RF power at ~ 150

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KHz) that can potentially make the Xerographic printing process work faster. Observed anonymous light emission at

various defect sites. Performed failure analysis and isolated electrical faults to electrode erosion. Demonstrated

improved electrode reliability with progressively better performing electrode materials. Trek high voltage equipment,

charge sensor, ozone detection equipment was used with this work. A Xerographic charging drum motion system was

put together for charge uniformity evaluation using National Instrument’s motion control amplifier (with feedback

control) and software drivers. Constructed and built an enclosed air flow test fixture with regulated air flow to

evaluate the reliability of these chargers in a simulated contaminating vapor ambient. Temperature and air flow rates

were monitored with this work using commercially available sensors.

Researched and fabricated silicone-based lithographic printing plates for a new on-demand lithographic printer. The

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printing surface had an ability to retain fountain solution for rejecting highly viscous litho printing inks. This enabled

a new high speed printing technology platform. Surface profiler, LSM, AFM, SEM/EDX was used with this work.

Investigated and optimized the water contact angle and surface energy of custom fabricated silicone printing plates as

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a function of high surface roughness and material component content for lithographic printing. This enabled effective

fountain solution retention for offset like lithographic printing. A Kruss contact angle & surface energy measurement

equipment was used with this work.

Designed, fabricated and evaluated a vanadium dioxide linear array modulator for laser light modulation (temperature

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dependent, printing application).

Established a back end assembly and packaging method and arranged for the inertial force calibration of the DARPA

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ANVS project inertial switch chip. The large cavity package was able to accommodate a battery and worked well for

this project.

Evaluated the metrology of co-extrusion print head components and solar cell substrates led to improved print

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placement accuracy.

Evaluated the metrology, coefficient of temperature expansion (CTE) and moisture absorption characteristics of

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various plastic films (including PEN films) which advanced the understanding of material film properties for a more

informed device and component candidate substrate selection.

Studied and delivered an integrated fluidic and electrical interconnect solution for a Xerox advanced high density,

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high resolution solid ink print head. Printing ink, protective coatings and ECB (Electronic Circuit Board) material

interaction as a result of high voltage exposure were also studied.

Designed a battery prototype test vehicle chip for evaluating an experimental plated silver electrode and potassium

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hydroxide (KOH) electrolyte battery system. Brought up a potentiostat galvanostat measurement system (PAR 263A

instrument and software) to study the battery charging and discharging characteristics. These activities enabled a

battery study program.

Member of Research Staff, Hardware Systems Laboratory / Document Hardware Laboratory, 1996-2005

Gained design, layout, fabrication and evaluation knowledge through work on several Xerox printing and display

programs.

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Designed, fabricated and evaluated an integrated heater and temperature sensing system for Xerox phase change ink

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printheads that operated at an elevated temperature. Studied various thin metal and sputtered dielectric films for

application as the heater element material. Worked on a thin film thermister self calibration method. Collected and

analyzed dielectric voltage breakdown data. Studied Aluminum wire bond and thin film heater trace electromigration

issues, fusing current limit and thermal cycling. Infrared sensing camera system and temperature sensitive paint/tape

were used to visualize temperature non-uniformities with this work. Enabled the successful technology transfer from

R&D to manufacturing at Xerox Wilsonville, OR.

Designed, layout, RF electrical tested (~ 150 MHz) and evaluated Acoustic Ink Printing (AIP) printheads. RF power

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switching, RF modulation and RF measurements were implemented in an automated Labview environment.

Participated in the overall print head architecture planning, and performed driving circuit micro-probing, debugged

the print head design, SPICE simulation, verification and transducer efficiency measurements. RF tuning was

performed with Agilent high frequency equipment to maximize the delivery of RF power to the ZnO based

transducers. Enabled the technology transfer to Xerox XMO manufacturing organization.

Put together two custom high wattage (25W & 110W) plasma generation power supplies (ballasts) with a custom RF

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matching network to drive an experimental plasma generating vacuum system. This experimental plasma vacuum

system enabled exploratory solar cell work.

Participated and contributed to the building of an industrial printer focusing on its vision system. The vision system

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had top and bottom viewing capability and was designed to also visually inspect the print head nozzle meniscus and

cleanliness condition.

Designed a MEMS test vehicle and evaluated piezoelectric device performance with a laser Doppler vibrometer. A

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Polytec LDV was used for this work.

Set up an imaging test system to evaluate the switching behavior of electric paper displays that had integrated rotating

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Gyricon balls.

Evaluated the aging characteristics and reliability performance of piezoelectric material through vibrational amplitude

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monitoring (laser Doppler vibrometer, LDV) of cantilevered beam samples under various temperature stress

conditions.

Characterized the dimensional stability (run out) of Printed Organic Electronics (POE) Polyethylene Naphthalate

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(PEN) substrates which had patterned layer to patterned layer misalignment and was subjected to various higher

temperature processing conditions.

Studied new inkjet pixel X-Y addressing / driving schemes using SPICE simulation.

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Brought up a Radiant Technology ferroelectric characterization system to study Polarization – Electric field (PE)

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hysteresis characteristics of piezo-electric devices.

Supervised, trained and scheduled packaging technician’s work on device assembly and fabrication emphasizing

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device yield and delivery targets. Calibrated force load cells were used to apply proper assembly pressure to

assembly fixtures.

Member of Research Staff, Electronics Imaging Laboratory, PARC

Honed testing and characterization techniques and skills while working on various amorphous silicon image sensors and

imagers.

Evaluated one-dimensional amorphous silicon image sensor array (color scanner) prototypes. Some evaluated

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parameters were QE measurements, light calibration, image response record captured with Tek/Sony RTD710

digitizer etc.

Evaluated two-dimensional amorphous silicon detector panels and high resolution color flat panel displays.

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Member of Research Staff, Integrated Circuit Laboratory, PARC

Learned bulk CMOS and polysilicon device technology development and device evaluation while working in a clean

room fab setting.

Technology development and device evaluation of bulk CMOS and poly-Si devices.

Hughes Microelectronics Research Center, Newport Beach, CA

Member of Technical Staff

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Primarily worked on CMOS/SOS technology development, device evaluation and radiation hardening of CMOS/SOS

devices. DOE experiments using bulk silicon substrates were also performed.

EDUCATION / TRAINING

MS, Electrical Engineering and Computer Science, University of California, Berkeley, CA

BS, Electrical Engineering and Computer Science, University of Pennsylvania, Philadelphia, PA

Material Research Society course on Plasma Etching

National Instrument Labview training

Accel EDA software for Schematic Editor, Library Manager, and PCB Editor training

PSPICE circuit simulation training

PSPICE workshop

Beseler RF circuits course

HP Microwave Fundamentals course

Nikon VMR Automated Metrology Microscope user training

ERT (Emergency Response Team), chemical handling, laser safety training

Languages: English (excellent); Written Chinese (excellent); Cantonese (proficient); Mandarin (good)

ADDITIONAL RELEVANT INFORMATION

Awards:

PARC Golden Acorn Award for Invention (highest PARC award), 2004

PARC Awards, 2009, 2007, 2006, 2004, 2003, 2002

DHL Certificate of Accomplishment, 2001

PARC retention bonus, December 8, 2000

Xerox Corporate Research & Technology X-Team Award, February 20, 1998

Xerox Excellence in Science and Technology Award, 1998, 1997, 1991, 1989

Xerox Achievement Award, 1998, 1995, 1985

Best Poster Paper Award (“A 6.3-Mpixel AMLCD”), 1993 International Symposium, Society for Information Display

Patents:

U.S. Patent Application 2013xxx, “Ultra-Fine Textured Digital Lithographic Imaging Plate and Method of Manufacture”.

U.S. Patent Application 2013xxx, “Ultra Method of Making a Molded Textured Imaging Blanket Surface”.

U.S. Patent Application 2013xxx, “Molded Textured Imaging Blanket Surface”.

U.S. Patent Application 201********, “Method of in-process intralayer yield detection, interlayer shunt detection and

correction”.

U.S. Patent 8,210,661, “Stacked slice printhead”.

U.S. Patent Application 201********, “Combined electrical and fluidic interconnect via structure”.

U.S. Patent 8,079,667, “Drop generating apparatus”.

U.S. Patent 7,901,130, “Method and apparatus for calibrating a thermistor”.

U.S. Patent 7,687,108, “Methods for manufacturing stressed material and shape memory material MEMS devices”.

U.S. Patent 7,572,051, “Method and apparatus for calibrating a thermistor”.

U.S. Patent 7,445,315, “Thin film and thick film heater and control architecture for a liquid drop ejector”.

U.S. Patent 7,372,348, “Stressed material and shape memory material MEMS devices and methods for manufacturing”.

U.S. Patent 6,561,640, “Systems and methods of printing with ultraviolet photosensitive resin-containing materials using

light emitting devices”.

U.S. Patent 6,536,889, “Systems and methods for ejecting or depositing substances containing multiple photointiators”.

U.S. Patent 6,217,151, “Controlling AIP print uniformity by adjusting row electrode area and shape”.

Michael Y. Young acd1hu@r.postjobfree.com 4

Publications:

“Characterization of a solid state air corona charging device”, SPIE/IS&T Conference, Feb. 2013.

“Defect identification in large area electronic backplanes”. IEEE Journal of Display Technology; 2009 January; 5 (1): 27-

33.

“Chlorine Corrosion of Aluminum Interconnect from Laser Activated Parylene in Acoustic MEMS Arrays”, ECS,

5/2002.

“Acoustic Ink Printing with Solid Ink”, IS&T NIP17: International Conference on Digital Printing Technologies. Fort

Lauderdale, Florida, October 2001, Volume 17, pages 669-672

“Accoustic Ink Printing: Photographic Quality Printing at High Speed”, IS&T NIP17: International Conference on

Digital Printing Technologies. Fort Lauderdale, Florida, October 2001, Volume 17, pages 660-663

"Testing and Failure Analysis of Two Dimensional MEMS Arrays", unpublished, 1998

“Imaging with page-sized A-Si:H two-dimensional sensor arrays”, SPIE Proceedings Vol. 2172, May 1994.

“A 6.3-Mpixel AMLCD”, 1993 International Symposium, Society for Information Display

"Improved Probe Positioning Accuracy on a Hybrid Prober for System Level Interconnect Applications", Electronic

Packaging & Production, 1988

"Planar Plasma Etching Applications to CMOS/SOS Devices", The Electrochemical Society Fall meeting, Hollywood,

Florida; October 5-10, 1980.

"IMMA Applications to Ion Implantation in Silicon-on-Sapphire", 1980.

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