Joemon Jacob

Mangalath

Pindimana P.O

Kothamangalam

Ernakulam 686692

email: accon2@r.postjobfree.com

Phone: +91-963*******

Career Objective:

To be associated with a progressive organization which can provide me with a

dynamic work sphere to extract my inherent skills as a Professional and help me

to attain my career targets on the progress.

SKILLS

Good knowledge in C, C++.

Experienced in Gnu Linux shell Scripting.

Good Knowledge of Verilog and Vhdl.

Academic Profile:

Completed PG Diploma from CDAC PUNE in VLSI Design with 72 %.

Completed B-Tech from CUSAT in Electronics and Communication with

61.10%.

Completed 12th in Computer Science from ST. Stephens HSS Keerampara,

Ernakulam with 82.50%.

Completed 10th from DON BOSCO HIGH SCHOOL Tezpur, Assam with

62.50%.

Academic Projects:

Mini Project : Laser based audio communication

Platform Electronic Circuit Design

Duration 3 weeks

This project aimed to transmit an audio signal using laser beam. Light from a laser

torch is used as the carrier in the circuit. Audio signals can be transmitted up to a

distance of about 500m using this circuit. Circuit comprises of a transmitter and a

receiver section. The transmitter section is comprised of pre-amplifier, operational

amplifier and laser diode. The receiver section of the laser communication system

has photo detector, Audio amplifier for better audibility and a transducer.

Main Project: Biometric Library Management

Platform Mikro C, MATLAB

Duration 2 months

This project aims to present a new Library Management System, it employs

biometrics in order to avoid rigging and to enhance the accuracy and speed of the

process. The system uses thumb impression for identification. The system consists

of a Microcontroller, Fingerprint scanner, GSM module and LCD display. A database

is created containing the thumb impressions of all the users using the library. The

thumb impression of a user is entered through the fingerprint module and verified.

Project at CDAC: Double Precision Floating point Multiplier

Platform RTL Coding (Verilog/System

Verilog/VHDL)

Duration 1 months

The project is based on IEEE paper published in April 2003. Double precision floating

point multiplier takes two 64 bit numbers as input, unpack it into exponent,

mantissa and sign bit as per IEEE -754 standard .It then does the multiplication of

mantissa part bias the exponent and determines the sign bit. The unit also takes

care of rounding and exceptional inputs. The unit also checks for invalid input,

overflow, underflow and not a number (Nan). The result is then packed to IEEE-754

format.

Extra-Curricular activities:

Active coordinator in Food & Hospitality of the inter college technical fest

ONYX 4.0 and intra college technical fest ALGORYTHM.

Active member of Electronics students association of our college.

Participated and won prizes in Essay writing, English Elocution competitions at

School and College.

Class representative at School and in Intermediate.

Reference: Available on request.

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