RESUME
Satish Sharma
M.Tech, VLSI Design
Patel Nagar Colony, Near C.C.I Computer
Shivpuri (M P)
Contact no-932-***-****
Email: acco23@r.postjobfree.com
Objective
Seeking a position with an organization where I can contribute my skills for organization’s success
and synchronize with new technology while being resourceful, innovative and flexible.
Skill Set
EDA Tools : Cadence Virtuoso Spectre Simulator IC6.1 Version
Layout design
Hardware Description Languages : Verilog, system Verilog.
: C & C++, Micro wind software lab, Basic knowledge
Software Skills
Java
Platforms : LINIX, UNIX, Windows.
Mathematical Tools : MATLAB. Xilinx simulator,
Operating system : Windows 98, 2003, 2007, XP, Internet application
MS Office, Power Point, Photo Editor
Technical Expertise
Design Reversible logic circuit with the help of pass transistor logic design 2:1 Reversible
Multiplexer and work on, Low Power CMOS VLSI Design, area as well as speed.
Academic Profile
Degree Board / University Year CGPA / Percentage
ITM University, 2011-
M.Tech [VLSI Design] Result Awaited
GWALIOR 2013
2007 -
B.E [ECE] R.G.T.U., BHOPAL 78.38%
2011
List of publication
International Journal of Emerging trends of in Electrical and Electronics (IJETEE) Under Review
Process.
International Journal of Computer Application (IJCA), July 2013: Published by Foundation of
Computer Science, New York, USA.
3rd IEEE Annual International Conference on Emerging Research Areas-International Conference
on Microelectronics Communication & Renewable Energy (AICERA-ICMiCR 2013) Kerala,
India.
2nd IEEE International Conference on Communication and Signal Processing (ICCSP’13)
Tamilnadu, India.
National level Conference on “Recent trends and Advances in VLSI Design” Sponsored by
AICTE.
Achievements
A National level workshop on “Digital System & VLSI Design”.
Won First Prize in Quiz Contest in college Level (G.K).
Two days Workshop on Automation in college Bhopal.
Four weeks MAJOR TRAINING from B.S.N.L. Shivpuri (M.P.).
Projects
M.Tech Project
Title: Emerging Design of Reversible Logic Multiplexer Using Efficient Nanoscale Technology
B.E. Major Project
Title: Line Follower Robot
B.E. Minor Project
Title: Remote Control of home appliances
Personal Strengths
Hard working and good at team work
Rapid at learning things
Good analytical & logical
Excellent problem solving skills
Personal details
Father’s Name : Munna Lal Sharma
Date of birth : 10.07.1989
Sex : male
Marital Status : Single
languages known : Hindi & English
Permanent address : Patel Nagar colony, Near C.C.I Computer
Shivpuri (M.P.) Pin 473551
Contact no : 932-***-****
Email : acco23@r.postjobfree.com
Nationality : Indian
Reference : Dr. Shyam Akashe, Associate Professor Dept. of Electronics
& Instrumentation ITM Universe, Gwalior, India,
(acco23@r.postjobfree.com)
: Achint Singh H.O.D Electronics & Communication
Department M.I.T, Bhopal, Contact no-982-***-****
: Manish Bansal, Design Engineer IBM India,
Email- acco23@r.postjobfree.com, contact no-992-***-****
Declaration
I, hereby declare that the all information’s given above are correct to the best of my knowledge.
Place: Shivpuri (Satish Sharma)