SHRIKANTH K.E.

No: *, *st STREET, GANDHI NAGAR,

M.M.C. POST, CHENNAI - 51.

Email id: acbxlu@r.postjobfree.com

Contact No: 91-979*******.

Career Objective:

To be a design engineer in a research field and apply all my skills

in a challenging work environment.

Academic Background:

< Bachelor of Engineering ( 2008-2012)

CGPA: 8.13 / 10

Dept. of Electronics and Communication Engineering

R.M.K. Engineering College, Anna University.

< Higher Secondary Course ( 2006-2008)

93%

P.A.K. Palanisamy Hr. Sec. School.

Tamil Nadu Higher Secondary Board.

< Matriculation - Tenth standard (2006)

91.2%

Velammal Matriculation Hr. Sec. School.

Tamil Nadu Matriculation Board.

Technical Skills:

< VLSI Domain:

. Xilinx ISE Design Suite 13.1- Chipscope, TCL console

. Cadence Digital Bundle - Incisive, RTL compiler,

Encounter

. Cadence Analog Bundle - Virtuoso, Assura

< FPGA Development boards :

. Altera DE2115 Cyclone 4 FPGA board.

< Circuit Designing and Simulation:

. Cadence 16.3 ( ORCAD Capture, PSpice, PCBEditor)

< Operating System Known :

. Windows 7 and XP.

. Basic commands of Red hat v5.0 Enterprise.

< Database Management Tools :

. ORACLE 11g.

< CAD Tools:

. AutoCAD 2010 (2D - Drafting).

< Java Tools:

. Eclipse IDE.

Work Experience:

1) Wipro Technologies, Hyderabad ( Dec 2012 - Present ):

Position : Project Engineer

Division : Product Engineering Services - Core Java Developer

Responsibilites:

1) Design, development, coding and unit testing of software

modules which comprise the training system.

2) Software will be developed / coded in Java on Unix

systems.

3) Development of GUIs.

4) Responsible for the documenting, developing and

maintaining the highly complex software application.

5) Familiar with Backend databases (ORACLE - 11.g).

6) Self-motivated, innovative, Hard working nature,

Dedication.

2) National Institute of Electronics and Information Technology,Chennai (

July 2012 - Nov 2012 ):

Position : Technical Assistant - Unofficial Work

Division : VLSI and Embedded Systems Group.

Responsibilites:

1) Assistant for Scientists (working in NIELIT,Chennai) for

their Research Work.

2) Worked on RTL design to GDS II file formation.

3) Assisting students during their lab work.

4) Preparation of course materials for trainees.

Programming Languages Known:

< Verilog HDL.

< C

< SQL

< Java - javascript, JSP,Servlets

< HTML Basics.

Achievements and Awards:

< Awarded Grade-6 in Spoken English Examination conducted by

Trinity College, London.

< Presented a paper at ASTHRA 2010,a national level technical

symposium in Vel-tech High tech Dr. Rangarajan Dr.Sakunthala

Engineering College.

Area of interest:

< Digital Circuits and Systems.

< VLSI.

Certifications:

< Attended Crash course on "RTL design Verilog and FPGA"

organized by DOEACC society, Chennai.

< Attended course on "ASIC Design and Verification" organized

by DOEACC society, Chennai.

< Completed Master Diploma in Electronic Design Automation at

CADD Centre Training Services, Chennai.

< Completed "CCNA Exploration: Network Fundamentals" course

conducted by CISCO Networking Academy.

Other Positions Held:

< Member of the team, which organized inauguration of ECE

Department association of our college.

< Member of ECE symposium organizing committee in our College.

< Online member in GreenPeace India foundation.

Personal Profile:

Fathers Name : K. Easwarababu.

Date of Birth : 26/07/1991.

Age : 22.

Languages known : English, Tamil & Telugu.

Passport No : J8538280

References:

< Ms. D. Jothi,

Assistant Professor,

Dept. of Electronics and Communication Engineering,

R.M.K. Engineering College.

Email id - acbxlu@r.postjobfree.com

< Mrs. T.Mullai,

Scientist - C,

National Institute of Electronics and Information Technology,

Dept. of Electronics and Information Technology,

Government of India.

Email id - acbxlu@r.postjobfree.com

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