Douglas P. Verret

281-***-****(h)

832-***-****(c)

aca5du@r.postjobfree.com

Resume

PERSONAL: Born February 19, 1947; married, two children

EDUCATION: PhD Physics, 1978, University of New Orleans, N.O. LA

MS Physics, 1974, Purdue University, W. Lafayette, IN

BS Physics, Summa Cum Laude, 1969, Spring Hill

College, Mobile, AL

EXPERIENCE

7/12-8/13: Flash EEPROM Program Manager, Texas Instruments, Inc,

responsible for developing 45nm eflash technology in

partnership with UMC for automotive, industrial and

commercial applications.

7/07-7/12: Flash EEPROM Program Manager, Texas Instruments, Inc,

responsible for developing 65nm eflash technology in

partnership with Taiwan Semiconductor Manufacturing Company,

HsinChu, R.O.C. for automotive, industrial and

commercial applications.

7/03 - 7/07: Flash EEPROM Development Manager, Texas Instruments, Inc,

responsible developing 130nm eflash technology for automotive applications

and ramping into production. Responsible for process, design, test,

reliability and product engineering.

12/97-7/03: Yield Team Leader, Texas Instruments, Inc, responsible for

leading a global team responsible for achieving yield targets for all

(13) TI fabs. Impact: $40M in incremental revenue over 4Q97. Also,

Known-Good-Die (KGD) Team Leader for microcontroller products.

8/96 - 12/97: Project Leader for PRISM with Flash EEPROM, Texas

Instruments, Inc, responsible for product development and yield

improvement for 0.8um mixed signal products (power, digital, analog,

flash)

1/94 - 8/96: Deep-submicron CMOS Strategist responsible for defining the

tool set,

manufacturing technology, and scaling strategy for 0.25um CMOS and

beyond for Texas Instruments, Inc.

3/92 - 12/93: FPGA Productization Manager, Texas Instruments, Inc,

responsible for developing and implementing into manufacturing two

0.8um Field Programmable Gate Array (FPGA) technologies combining low

voltage CMOS, high voltage CMOS and antifuse structures. Directed the

activities of about 30 engineers and technicians, about half of whom were

direct reports.

1/91 - 3/92: responsible for developing the strategy for the fan-out of

the 16Mb Dynamic Random Access Memory (DRAM) from Dallas to Italy,

Taiwan, Singapore and Japan.

7/90 - 12/90: Director of Manufacturing Techniques and Standards,

SEMATECH, Austin, TX. Responsible for Standards, Analytical Labs,

Statistical Methods,

Equipment and Factory Modeling, Parametric and Sort Test,

Process Integration, Design and Product Engineering. Supervised about

70 exempts and 20 non-exempts.

11/88 - 7/90: Manager of Process Integration, Design and Product

Engineering, SEMATECH. Responsible for developing 0.5 and 0.35 um CMOS

processes, the design of defect and parametric test dice, and the design

of a register file and 1Mb SRAM. Supervised about 26 exempts and 4 non-

exempts.

4/82 - 11/88: Houston Bipolar and BiCMOS Development Manager, Texas

Instruments, Inc, responsible for the process integration and process

development for new products and their implementation into production.

Managed a prototype facility and supervised about 20 exempts and 30

non-exempts. Responsible for $6M annual budget, capital

recommendations, equipment evaluation, competitor evaluation, staffing

and strategic technology planning. Developed and implemented trench

isolation, poly emitters, W-plugged vias and contacts, plated Cu

interconnects, poly self-aligned bipolar transistors and TLM. Also

developed 2.0, 1.5 and 1.0 um BiCMOS processes and introduced into

production.

1/81 - 4/82: Process Development Engineering Section Mgr, Texas

Instruments, Inc.

Responsible for development of processes for use in the fabrication of

new

products.

6/79 - 1/81: Metallization and Passivation Process Engr, Texas

Instruments, Inc. Responsible for the implementation of DLM processes

for LS/LPS products and the characterization, maintenance and yield

improvement of commodity products.

8/74 - 5/79: Assistant Professor of Physics and Pre-engineering, Xavier

Univ of LA.

1969 - 8/74: Physics and Mathematics High School Teacher Archbishop Rummel

HS, Metairie, LA, Catholic HS, Baton Rouge, LA, Brother Martin HS, NO LA

PROFESSIONAL AFFILIATIONS: member American Physical Society, SIGMA XI, and

Union of Concerned Scientists; IEEE Fellow; former member American

Institute of Physics and American Association of Physics Teachers

OTHER:

SC Patent Committee Member; Corporate Engineering Council member; SC

Engineering Training Steering Committee Member; SRC Industrial Mentor

at Univ of FL and Univ of MI; Front-end Training Site Coordinator;

16Mb DRAM Audit Committee Chairman; International Electron Devices

Meeting (IEDM) Technical Program Committee; IEEE Bipolar/BiCMOS

Circuits and Technology Meeting (BCTM) Program Committee member, Panel

Discussion Chairman and Technical Program Chairman 1993; founding co-

chairman of Design Rule and Process Architecture FTAB at

SEMATECH; member IEEE Electron Devices Society Publications Committee;

member IEEE TAB Periodicals Committee; member IEEE Working Group on

Publication Standards; member IEEE Crosscheck Evaluation Committee;

member Steering Committee IEEE International Symposium on Quality

Electronic Design (ISQED); past member Baylor University College of

Engineering and Computer Science Advisory Board; past member Fort Bend

Business Partners in Education Council; past member Fort Bend

Education Foundation Board; Chairman TI Manufacturing Technical

Council until retirement; member TI Technical Ladder Policy Board

until retirement; Member IEEE Electron Devices Society Board of

Governors, Member of IEEE Electron Devices Society Fellow and

Education Awards Committees, Member Steering Team of IEEE Journal of

Photvoltaics

PUBLICATIONS: Twenty internal and external publications. List available

upon request.

PATENTS: Sixteen US patents and eight pending including trench

isolation, plated Cu interconnects, high performance bipolar and

BiCMOS processes, local

interconnects, and Si/Ge alloy structures and devices and deep

submicron CMOS devices. Ricipient of half dozen patent incentive awards.

List of patents available upon request.

CAREER HIGHLIGHTS:

1968: Elected to Phi Eta Sigma honor society.

1969: Recipient of Spring Hill College President's Award for

achievement in physics.

1970: National Science Foundation Fellow, Purdue

University.

1975: UNCF Dana Fellow, University of New Orleans.

1977: Recipient Sigma Xi (Scientific Research Society of

North America) "Outstanding Graduate

Research Award" at the University of New

Orleans.

1984: Shipped first digital bipolar product with poly self-

aligned transistors and trench isolation

manufactured in US.

1985: Shipped first digital BiCMOS product manufactured in

US. Elected Senior Member of Technical

Staff, Texas Instruments.

1987: Elected Senior Member Institute of Electrical and

Electronics Engineers (IEEE).

1990: Named Director of Manufacturing Techniques and

Standards at SEMATECH.

1992: Elected Texas Instruments Fellow.

1993: Named Technical Program Chairman of IEEE Bipolar

Circuits and Technology Meeting (BCTM).

1995: Named CMOS editor of IEEE Transactions on Electron

Devices

1996: Named to Advisory Board of Baylor School of

Engineering and Computer Science.

Secretary in 1997; vice-chairman 1998.

1997: Named to Advisory Board of K.V. Hightower High School

Engineering Academy, FBISD

2000: Named Editor-in-Chief of IEEE Transactions on Electron

Devices

2003: Elected IEEE Fellow

2006: Awarded Spring Hill College Medal, Distinguished Alumnus

2006-07: Member IEEE Working Group on Publication Standards

2008: Member IEEE TAB Periodicals Committee

2008: IEEE Crosscheck Evaluation Committee member

2010-present: J-PV Steering Committee member

2012-14: EDS Education Award Committee member

2012: EDS Distinguished Service Award

2012-14: EDS Education Award Committee member

2013-2015: EDS Fellows Evaluation Committee member

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