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Engineer Process

Location:
Austin, TX
Posted:
February 01, 2013

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Resume:

Annette Magnella

Email: abqi96@r.postjobfree.com

Address: *** ***** ***** *****

City: Lakeway

State: TX

Zip: 78734

Country: USA

Phone: 512-***-****

Skill Level: Experienced

Salary Range: $50,000

Primary Skills/Experience:

See Resume

Educational Background:

See Resume

Job History / Details:

Annette M. Magnella

118 White Sands Drive Austin, TX 78734

512-***-**** 512-***-****

abqi96@r.postjobfree.com

Professional Profile

BROAD-BASED BACKGROUND DYNAMIC, RESULT-ORIENTED EFFECTIVE & INNOVATIVE

Process Improvement Manufacturing Optimization Enterprise Software Planning

Market Strategy Planning Capital Equipment Installation Cross Functional Collaboration

Product Strategy Development Factory Design & Capacity Planning Negotiation Skills

Project Management Inventory & Quality Control Implementation Personnel Management

Professional Experience

PAMELA KRUEGER & COMPANY, Inc. Austin, Texas

Investment Management & Consultation

Marketing Manager Mar 1997 May 1999

Responsible for creating, defining and implementing the marketing campaign to meet the client goals of Charles Schwab & Co. AdvisorSource

referrals and non-Schwab referrals.

Integral contributor in contracting 20% growth in 1997 and 31% growth in 1998 in new investment revenues.

Responsible for the installation and adaptation of Goldmine contact management software.

MOTOROLA (Now Freescale) Austin, Texas

Semiconductor Sector Products Division

Business Planning Manager : FSRAM Business Group Jun 1995 - Jan 1997

Created and redefined product strategy scenarios to meet 1996 revenue goals of $500M in sales and forcast sales profiles to achieve a $1.4B

Five Year Plan.

Streamlined business practices and defined procedures to achieve 1995 revenue goals of $375M.

Played a significant role in Sector wide acceptance of the Sales & Operations Planning techniques that were defined, developed, initiated and

beta tested in the FSRAM division during my tenure.

Organized a cross-functional team to define process change requirements for the successful beta-test, installation and conversion to SAP, MMRP

& PPS software.

Semiconductor Sector Products Division Jul 1993 - Jun 1995

Manager Production Control : MMTG Manufacturing Planning And Rationalization

Continually developed and maintained knowledge of MMTG Operations and factory capacities, developing consensus between operations, wafer

demand and manufacturing capacity relative to short-term demand, budget and five year plans.

Created and redefined scenarios based on technology demands, industry trends, revenue analysis, capacity constraints, and costing.

Completed and submitted the front-end capacity plan for the MMTG 1995 Budget Cycle totaling $1.8B in sales. Completed the front-end

capacity plans for two 1995 MMTG Five Year Plans totaling $4.0B and $5.3B in sales.

Responsible for the rationalization of wafer fab capacity for MMTG factories and MMTG parts in non-MMTG factories. Tasks include revisions to

budget plans in response to changing customer requirements, analyzing multiple planning scenarios, and providing recommendations to modify

current factory capacity to meet the various scenarios.

Completed the 1994 MMTG Five Year Plan cycle.

Defined overall PowerPC 1994 capacity plan based on requirements from wafer start to finished goods.

Resume: Annette Magnella Page 1 of 3

Semiconductor Sector Products Division Jul 1991 - Jul 1993

Staff Process Engineer : Diffusion

Responsible for the purchase, characterization, and documenting the release of new equipment as required to support the factory ramp.

Primary sustaining responsibilities included Front-end Thermal oxidations, Well Drives, Nitride LPCVD, CV Plot, along with Quartz ware

forecasting, purchasing, and inventory control. Achieved and sustained 6-sigma process capability on all processes.

Organized a cross-functional Nitride In-film Particle Reduction team for identifying, targeting and resolving key process, design, and operator

specification issues targeted as key influences on the generation of high in-film particle levels. The team was nominated for a Manufacturing

Excellence Award in July, 1992. Process stabilization enhanced along with a 5x reduction in particle levels. A key product of the group was the

successful engineering and integration of the vertical double wall tube nitride process.

Completed process testing, specification and PROMIS requirements to support the 0.5 CMOS and Bi-CMOS process transfer. Performed in-

depth construction analysis to confirm birds beak formation with the PBL isolation process between MOS11 and APRDL. Performed construction

analysis on gate-thinning effects between several approaches to the Sacrificial Gate and Gate modules.

Semiconductor Sector Products Division Jan 1990 - Jul 1991

Senior Process Engineer : Diffusion

Integral part of the successful start-up of the first 100% vertical 200mm Factory in the world. Tasks included equipment vendor evaluation and

selection, purchasing agreement negotiations, vendor site rotations, equipment source inspections, equipment acceptance testing, tool set

characterization and process development.

Key equipment set included SVG and TEL thermal oxidation POCL3 and LPCVD systems, EPI, CV Plot, Box wash, Quartz cleaning and storage.

Associated knowledge of wet processing and associated measurement equipment.

Responsible for the successful transfer, integration, and qualification of FSRAM and MPU diffusion processes originating from a 125mm facility.

Additional responsibilities focused on SLIP reduction.

Forecasted and managed the purchasing and inventory control of fab wide quartz ware requirements.

Software responsibilities included the development of PROMIS as a shop floor control system to track WIP through the diffusion area. Additional

products from this task included 100% computerized process specification system, automated batch tracking and on-line Statistical Process

Control.

HARRIS CORPORATION Melbourne, Florida

Semiconductor Sector, Products Division Jul 1989 - Jan 1990

Senior Diffusion Process Engineer

Consultant to HSS Mountaintop Smart Power ASIC process. Tasks included determination of process capabilities and their correlation to device

functionality, particulate reduction, and implementation of Statistical Process Control in all areas of ion implantation and diffusion.

Responsible for process development and sustainment in device fabrication encompassing 5" CMOS technology. Areas of responsibility were

thermal oxidation and LPCVD.

Project leader for yield enhancement in the areas of silicon defect reduction and denuded zone process development.

Designated custodial and facility coordinator for dormant VLSI fabrication area. Responsibilities included scheduling of equipment transfers,

sustainment of equipment required for continued R&D support, and maintaining a safe and secure environment during defacilitization of

equipment.

Government Systems Sector, VHSIC Operations Oct 1986 - Jul 1989

Senior Diffusion Process Engineer

Responsible for process sustainment in device fabrication encompassing CMOS sub-micron VLSI technologies. Areas of responsibility included

thermal oxidation, LPCVD, medium current and high energy ion implantation, and associated clean processes.

Leader and supervisor of first shift work cell. Responsibilities encompassed daily scheduling of production and equipment maintenance priorities

in the diffusion area.

Increased overall LPCVD process capability by 30% and process capacity by 25%

Established SPC in the area to monitor process variability and track particle generation.

Reduced overall cycle time in the area by an estimated 35%.

Responsible for yield enhancement in CMOS VLSI technology via development and implementation of process improvements using statistical /

factorial design methodology.

Demonstrated significant improvements in VLSI Gate Oxide Integrity development.

Characterized processing effects on silicon, quantifying defect densities by in-situ process defect etch counts and their correlation to VLSI device

performance.

Directed activities to construct VHSIC process specifications for compatibility and fab line qualification in compliance with Joint Army Navy

military specifications.

Supervised, administered and coordinated a Fab Certification Program to formally train, preserve, and provide accurate documentation for

operator certification in compliance with the VHSIC process and JAN military specifications.

Automated process control chart feedback through implementation of applicable Computer Aided Manufacture and RS/1 QCA systems software.

Resume: Annette Magnella Page 2 of 3

Semiconductor Sector, Products Division Feb 1984 - Oct 1986

Senior Product Engineer, Materials Process Engineering And Development Group

Conducted methods development to reduce metallic contamination in the Materials fab line, dedicated to Dielectric Isolation technology.

Evaluated, designed, and proposed methods to increase efficiency in wafer handling and transport.

Designed a Redundant Processing Facility to accommodate 100mm manufacture of DI material.

Interfaced with device/product engineering groups incorporating process developments and adapt new circuit designs into the Materials fab line.

Responsible for process sustainment in the areas of Electrochemical Etch, Front-side Isolation Polish (Chemical Mechanical Polish), final

inspection, and critical clean processes prior to high temperature operations.

Completed tasks encompassing methods design to increase wafer throughput, effective application of SPC to monitor process variables, yield

enhancement and cycle time reduction via process development and standardization, capital equipment justification and installation.

Community Leadership Profile

LTHS Football Booster Club, Golf Tournament Chair Jul 2010 - Jun 2011

Achieved 39% Increase in Revenue with a realized gain of 28% in profit

Booster Club President, Hudson Bend Middle School Jul 2009 - Jun 2011

Doubled Earnings Year on Year, with over a 300% Increase in Retained Earnings at End of Tenure

PTA Treasurer, Lake Travis High School Jul 2007 - Jun 2009

Board of Directors, Treasurer, Lake Travis Youth Association May 2005 - Jan 2009

32% Growth Exceeding Greater $1M in Annual Revenue, Used Quickbooks multi-License

Vice President, State PTA Area 6 June2007 - May 2008

Coverage includes the counties of Bandera, Bastrop, Blanco, Burnet, Caldwell, Fayette, Gillespie,

Hays, Kendall, Kerr, Kimble, Lee, Llano, Mason, Travis, and Williamson

213 PTAs, 49,963 members

City of Lakeway Homeowners Association Board Member 2006

Area Field Representative, State PTA Area 6 Jun 2005 - May 2007

Coverage included ~28 independent PTAs

PTO Treasurer, Hudson Bend Middle School Jul 2004 - June2006

Board of Directors, Secretary, Lake Travis Youth Association May 2003 - Apr 2005

PTA President, Lake Travis Elementary Jul 2001 - Jun 2004

Integral Leadership Role in Strengthening Parent Participation Resulting in the Demolition and

Re-Construction of Lake Travis Elementary School

PTSA Treasurer, St. Gabriels Catholic School Jul 1999 - Apr 2001

Owner & Partnership

FAUX LO Custom Jewelry Design Jan 2004 - Present

Education and Co-Op Experience

WEST VIRGINIA UNIVERSITY BS Industrial Engineering 1983

NATIONAL STEEL CORPORATION Weirton, West Virginia

Weirton Steel Division, Industrial Engineering Department May 1981 - Aug 1983

Resume: Annette Magnella Page 3 of 3



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