James Shen

*** ***** ***** *****, ****, NC *****

919-***-**** (H), abl9id@r.postjobfree.com

Qualification Summary

. Analog circuit design.

. Semiconductor process integration and device development of CMOS,

Bipolar, NVM, DMOS, HV devices, and various passives. Extensive bench

testing for device performance and reliability characterization. Yield

enhancement. Product failure analysis.

Semtech Corp., Sr. Process and Design Integration engineer Raleigh,

NC 2007 - 2008

Joined development of a 0.18um BCD process for power management with

a foundry, and joined setup of a new design kit (PDK):

Development of Low Rdson and low leakage CMOS, Bipolar, DMOS,

passives.

Design rules, DRC deck, LVS, Pcells, Calibre, EDR, Designed test

structures and circuits for PCM, for accurate SPICE and MC modeling

extraction and modeling validation, and for silicon debugging. Mask tape

out procedures.

Designed Buck converters for device and process development

evaluation. Product yield enhancement. Unix, C.

Atmel Corp., Sr. lvl Process Integration/Analog Design/Process Colo.

Springs, CO 1994 - 2007

Analog design

Designed a SAW oscillator of 433 MHz circuit with RF PA output in a

SiGe BiCMOS technology.

Designed capacitive based evaluation circuits for 8bit ADC and DAC in

a 0.18um technology.

Helped design activities on the technologies I have developed, and

circuit debugging.

Process Integration/Device Development

Were responsible for every thing needed to develop a new process

technology from beginning to its releasing to high volume production:

Process integration and Device development of CMOS, Bipolar, NVM and

memory cell design, DMOS, HV devices, and various passives. Process Flows.

Design rules. Process and Device simulation (Silvaco). Parametric test

structure design (I drew them by myself) and Parametric testing conditions

and limits for both development and for manufacturing (PCM). Test

structures for Spice modeling. Tape out procedures. Performed bench testing

extensively on silicon wafers for device performance and reliability

characterization.

As the principal development engineer for an embedded BiCMOS EERPOM

technology have developed the technology on 0.35um, and 0.18um process

nodes into high volume production.

Joined development of the technology on 0.5um mode.

Joined a SONOS Flash memory technology development on 0.13um node.

Jointly developed embedded CMOS EEPROM process technologies with DMOS

of supporting 40v and 100v.

Yield enhancement on products (technology drivers) of each technology

to reach yield goal of above 80% before releasing the technology to

manufacturing groups or to external foundries.

Optimized ATE test plan for yield enhancement.

Yield Enhancement in Process engineering

Have brought up the in-line defect inspection/reduction program for

the company. Correlated product probing results and parametric test results

to in-line measurements to identify process, technology, or design

problems. Characterized and solved process defect problems in etch, photo

lithography, metals, dielectric films, and CMP by inspections, and by

performing DOE, Statistical Process Control (SPC) and ANOVA to either

identify problems or to fix or to improve process and yield. Sometimes

acted as a module process engineer in etch and in photo to improve process

recipes. Evaluated, recommended and brought up inspection equipment of SEM,

X-ray chemical component analysis, KLA, Tencor, and yield analysis

programs. Jointly evaluated FIB, SIMS, Auger, and AFM with Failure Analysis

Lab.

National Semiconductor, Product engineer, Arlington, TX 1992

-1994

As the only college hire in the start up team, have joined the transfer of

a 0.8um CMOS process from the R&D center to a new fab and process/product

qualification of the fab. Improved a yield modeling package linking

electrical monitors to product layout.

Education:

M.S.E.E, Microelectronics Research Center, University of Texas at

Austin 1992

B.S., Physics, Tong-Ji University, Shanghai, China

1988

Computer Science, NC State, C++, Unix, Java I, Java II, SQL, Oracle

database 2009

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