QUALIFICATION SUMMARY

Highly technical, engineering manager/lead engineer with excellent cross-

functional skills in hardware design, software design, project management,

and product development.

Key Accomplishments:

Developed messaging appliance that reduces data latency by a factor of ten,

increases throughput by a factor of five, and reduces power by a factor of

three over existing solutions. Defined new techniques for measuring

processing latencies at sub microsecond resolutions.

As Senior Project Manager at Federal Signal, designed the audio system

controller for a public address and general alarm system, upgraded the

department's infrastructure to support complex electronic designs, defined

design processes, reviewed project staffing requirements, and generated

project schedules.

Lead hardware designer of the Metro Ethernet Access (MEA) system, developed

jointly between Turin Networks and Motorola Broadband Systems. Managed the

technical relationship between Turin and Motorola BSG and provided

technical input on system's architecture in addition to designing a

majority of the system's service cards.

Successfully delivered the first prototype, and subsequent production

versions, of the Traverse controller module and timing subsystem for the

company's flagship product currently deployed in over 200+ customer

networks.

Electrical Design Experience Summary:

. Expert in embedded system design. Designed systems based on the

following microprocessors/microcontrollers: Cavium Networks CN5860

(MIPS), Analog Devices Blackfin DSP, Freescale MPC854E (PowerPC),

MPC8260/80, MPC860, MC68EN360, 68001, IBM PPC750CX & Philips 8051XA.

. Expert in memory system design utilizing various technologies such as

NOR/NAND Flash, SRAM, QDR-SRAM, SDRAM, DDR2, and RLDRAM.

. Extensive experience designing and debugging chip-to-chip interfaces

including I2C, Motorola SPI, SPI-3/4, PCI, PCI-X, and PCI Express.

. Expert in high-speed digital design, simulation, and analysis, both

signal-ended (e.g. SSTL, HSTL) and differential (e.g. PECL, CML) I/O.

. Extensive experience designing digital logic in Altera and Xilinx CPLD

and FPGA devices.

. In-depth knowledge of telecommunication and networking protocols:

T1/E1, DS3, SONET, EoS, Carrier Ethernet, TCP/IP, UPD, PGM, RDMA, 10G

Ethernet and Infiniband.

. DPLL design using PFD and discrete active loop filter for GR-253

compliant timing subsystem.

. DC/DC power supply design - both linear and switching regulators.

. Analog audio/data circuit design for MIL, ANSI and Telcordia standard

interfaces.

. Managed regulatory compliance system testing to NEBS, ETSI, FCC, UL

and other agency requirements.

. Experienced in Design for Manufacturing (DFM) and Design for Test

(DFT) processes.

Software Experience Summary:

Developed test code in assembly, C, and C++ for verification of embedded

system designs

Designed system supporting various operating systems including embedded

Linux and VxWorks.

Design Tools Experience Summary:

Schematic Design Tools: Orcad Capture, Mentor Graphics and Cadence Capture.

Design Simulation Tools: Orcad PCB-SI, HyperLynx, HSPICE, QuickSim, &

others.

Scopes and Analyzers: TDR's, high-speed oscilloscopes, logic analyzers,

packet data generators & BERTs.

Statistical Analysis Tools: Monte Carlo Simulation, PHStat.

In-circuit emulators: WindRiver VisionProbe/ICE, Nohau 8051 and HP LA

disassemblers.

EDUCATION

University of Chicago Graduate School of Business - Chicago, Illinois

MBA with Concentrations in Strategic Management, Finance, and Accounting,

March 2009.

Valparaiso University, College of Computer & Electrical Engineering -

Valparaiso, Indiana

Bachelor of Science in Electrical Engineering (BSEE), December 1990.

PROFESSIONAL EXPERIENCE

Trading Technologies, Inc - Chicago, Illinois January 2008 - Present

Hardware Development Manager

Established hardware development group at Trading Technologies to architect

and design high-performance appliances and off-load engines based on multi-

core and FPGA technology that provide customers a competitive advantage.

. Provide key technical input and leadership on architecture and design

including technology selection. Design major subsystems and review

all work of development team.

. Primary decision maker for all hardware development related projects.

. Develop budgets, outline work flow, generate detailed schedules, and

identify project staffing requirements.

. Establish processes for designing, prototyping and producing new

products.

. Vet component and contract services suppliers for technical

capabilities and pricing.

Tellabs, Inc. - Naperville, Illinois December 2006 - January 2008

Staff Engineer

Responsible for system and hardware design of new circuit packs used in

Tellabs Advanced Data Products MPLS Router, including feasibility analysis

based on marketing and system requirements, major component selection and

trade-off, timing analysis, signal integrity and cross-talk analysis,

verification of final designs, and integration support.

. Designed microprocessor subsystem based on Freescale MPC8548

communication controller. Interfaced to peripheral components via I2C,

SPI, PCI-E, PCI-X and Gigabit Ethernet.

Federal Signal Corporation. - University Park, Illinois January 2006 -

December 2006

Senior Electronics Project Manager

Senior Project Manager's responsibilities included architecting and

designing a DSP based system controller for a public address and general

alarm system, upgrading the department's infrastructure to support complex

electronic designs, defining development processes, reviewing project

staffing requirements, and generating project schedules.

Turin Networks, Inc. - Petaluma, California May 2000 - January 2006

Senior Member of Technical Staff

Led design and integration of infrastructure hardware and circuit-pack

assemblies (line cards) used in the Traverse Metro-access MSPP and MEA

(Ethernet access switch). Specific responsibilities included...

Design of next generation 2.5G Ethernet-Over-SONET/SDH module for the

Traverse MSPP.

Design and support of Ethernet access switch appliance.

Tellabs, Inc. - Bolingbrook, Illinois April 1998 - April 2000

Lead Engineer - Broadband Media Group, Cablespan

Designed electrical assemblies for a cable-telephony system used to deliver

residential voice and data services over hybrid fiber-coax networks.

Specific responsibilities included...

Acquired design of Data Link Processor hardware from strategic business

partner.

Re-design of CPU module hardware to increase performance and incorporate

cost reductions.

ITT Aerospace/Communications Division - Fort Wayne, Indiana December 1992

- April 1998

Senior Design Engineer - Digital/Analog Hardware Design

Responsible for the design, layout, qualification and integration of

circuit card assemblies used in the baseband section of a spread-spectrum

radio system, SINCGARS.

Advantis - Schaumburg, Illinois November 1991 - November 1992

Network Analyst - Network Control Center

Analyzed problems on a global SNA network and implemented corrective

action.

iic Micro Systems - Valparaiso, Indiana March 1991 - November 1991

Systems Integration Engineer

Designed and integrated hardware sub-assemblies in the iFrame, an Intel

based multi-processor server.

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