Post Job Free

Resume

Sign in

ASIC/SoC Design Engineer

Location:
Parker, CO
Posted:
January 19, 2015

Contact this candidate

Resume:

IMPROBABLE SOLUTIONS ENGINEERING SERVICES LLC

■ ■

Resume

of

SCOTT

J.

GRIFFITH

EXPERTISE:

Custom

Integrated

Circuit

design

with

an

emphasis

on

mixed

standard

cell

and

full-

custom

design,

CAD

development

and

design

automation

flow

creation

(Perl,

C,

C

deconstruction

and

deprocessing

of

semiconductor

devices,

circuit

extraction

and

physical

design

analysis

for

patent

prosecution,

and

expert

witness

testimony.

EXPERIENCE:

11/97

to

date:

Principal

of

ISES-

LLC,

an

independent

consulting

practice.

Tasks

undertaken

for

a

variety

of

clients

have

included:

development

and

maintenance

of

customized

standard

cell

libraries

for

high-

integration

System-

on-

Chip

(SoC)

ASIC

designs,

development

and

maintenance

of

custom

CAD

frameworks

(thousands

of

lines

of

custom

Perl

code)

for

automated

library

characterization

and

generation

of

models

for

synthesis

and

timing

analysis,

deprocessing

and

extraction

of

physical

schematics

from

targeted

CMOS

ICs,

and

preparation

of

detailed

patent

infringement

reports

to

support

licensing

and/or

prosecution

efforts.

7/86

to

11/97:

SUN

MICROSYSTEMS,

Mountain

View,

Ca.

Senior

Member

of

Technical

Staff,

responsible

for

cell

library

maintenance

and

characterization

CAD

flows

for

deep

submicron

high

performance

CMOS

microprocessor

designs.

Previously:

Manager

of

Cell

Library

group,

responsible

for

management

of

a

group

tasked

with

design

and

implementation

of

static

and

dynamic

circuits

intended

for

the

UltraSPARC

family

of

microprocessors.

Senior

Engineer

responsible

for

physical

design,

circuit

design,

and

cell

library

development

for

the

MicroSPARC

I

and

II

processors.

Other

designs

undertaken

include

a

high

speed

single-

chip

cache

memory

subsystem

for

the

Intel

386

processor

(including

full-

custom

CAM

and

RAM),

physical

design

of

a

standard

cell-

based

graphics

accelerator,

and

logic

design

of

a

gate

array

memory

controller

unit

for

the

Motorola

68030.

10/85

to

7/86:

GENERAL

COMPUTER

COMPANY,

Cambridge,

Ma.

Architectural

Lead

for

a

proprietary

CMOS

microprocessor

project.

Technical

Lead

for

a

Winchester

hard

disk

subsystem

project

for

the

Apple

Macintosh

Plus

personal

computer.

10/84

to

10/85,

and

3/87

to

10/87

(consulting):

KURZWEIL

MUSIC

SYSTEMS,

Waltham,

Mass.

VLSI

Engineer

responsible

for

design

and

implementation

of

a

custom

CMOS

VLSI

signal

processing

IC

intended

for

use

in

high

volume,

cost

sensitive

consumer

electronic

musical

instruments.

10/82

to

10/84:

GENERAL

COMPUTER

COMPANY,

Cambridge,

Ma.

Design

Engineer

involved

in

the

design

of

custom

CMOS

VLSI

ICs

for

high-

volume

consumer

electronic

applications.

Designs

included

a

digital

sound

synthesis

IC

with

on-

chip

DAC,

and

a

high-

performance

consumer

video

graphics

controller

IC

used

in

the

Atari

7800

consumer

game

console.

3/81

to

10/82:

COMPUGRAPHIC/QUADEX

SYSTEMS

DIVISION,

Cambridge,

Ma.

Design

Engineer

in

a

one-

man

engineering

department.

Responsibilities

included

everything

from

TTL

system

design

through

documentation

and

support

of

production

and

field

service.

EDUCATION:

Massachusetts

Institute

of

Technology,

Department

of

Electrical

Engineering

and

Computer

Science.

PERSONAL:

US

Citizen.

Member

of

IEEE,

AES,

SAE.

2

US

patents

on

microprocessor

circuit

design.

Co-

author

of

1

paper

on

high

speed

cache

design

presented

at

CICC

'87.

References

available

upon

request.

ISES-LLC

Post Office Box 4501

PARKER, COLORADO 80134

303-***-**** 303-***-**** fax

abjdew@r.postjobfree.com



Contact this candidate