Andy Guo
Roslyn Heights, NY *1577
Tel: 516-***-****
Email: abj5bz@r.postjobfree.com
Education
Bachelor of Engineering, Electrical Engineering May 2013
The Cooper Union for the Advancement of Science and Art, New York, NY
Full Tuition Scholarship 2009 - 2013
Work Experience
RF Test Engineer I, Mini-Circuits, Brooklyn, NY Apr 2014 - Present
• Test various components at different stages of design and collect data for customer applications.
Components include filters, couplers, splitters, transformers, multipliers, mixers, switches, limiters,
amplifiers, etc., operating from DC up to 26 GHz.
• Experienced in testing for S-parameters, compression, intermodulation distortion and intercept point,
harmonic rejection, stability, power handling, noise figure, and commercial and military temperature
specifications.
• Analyze test data and evaluate performance to write test reports.
Obsolescence Engineering Intern, Parker Hannifin ESD, Hauppauge, NY June - Aug 2012
• Processed the introduction of new RoHS compliant and intrinsically safe parts into the database to
replace obsolete parts. Contacted suppliers and customers regarding affected parts.
• Analyzed transient voltage suppressors (TVS) in lightning protection circuits used in aircrafts. Analysis
included DC leakage, power consumption, thermal heat dissipation.
Audio/Visual Technician, Cooper Union IT Department, New York, NY Sept 2011 - June 2012
• Prepared and set up audio and visual equipment for lectures and presentations.
• Manage equipment rental and returns.
Projects
Active Noise Cancelling, Speech Enhancement Headphones, Senior Project Fall 2012 - Spring 2013
• Designed headphones to actively cancel all sounds with adaptive algorithms using MATLAB/Simulink
and implement a microphone array beamformer for speech enhancement.
• Used Texas Instruments’ OMAP L137 C6747 and Analog Devices’ ADI 21489 digital signal processor
boards.
RF Design using Agilent ADS, Microwave Engineering Fall 2012
• Final project is a 16 QAM vector modulator designed on Agilent ADS operating at 5.1 GHz and able to
meet design specs such as bandwidth, amplitude and phase accuracy, and return loss. Design consisted of
splitters, phase shifters, attenuators, and biasing.
Analog/Digital Circuit Design using Cadence, Integrated Circuit Design (VLSI) Spring 2012
• Schematic modeling, circuit layout, extraction, simulation, and verification in ANI-06N process (0.6 um
technology).
• Final project is a phase-locked loop designed using VLSI CAD design tools (Cadence). The extracted
layout simulation showed the PLL locked onto a 100 MHz signal in 0.8 us.
Skills
Hardware: Agilent ENA and PNA-(X) Series Vecter Network Analyzers, Spectrum Analyzer, Signal
Generator, Power Meter, Oscilloscope
Software: Agilent ADS and Momentum, HSpice, LTSpice, Cadence Design Tools, Microsoft Office,
MATLAB/Simulink, AutoCAD, SolidWorks, Visio
Languages: Familiar with {C, C++, Python, HTML, SQL}
Miscellaneous: Conversant in Mandarin Chinese