| Job alert | Jobs 71 - 80 of 1818 |
Design Verification (Performance) Engineer
TALENT Software Services
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Austin, TX, 78716
... Qualifications Experience with HDL/HVL like Verilog, System Verilog, VIP monitors, UVM methodology. Strong understanding Bus Protocols like AHB, AXI, NIC, ACE, NOC. Understanding of processor architecture, debug architecture, Cache Coherency ... - Apr 30
Senior ASIC Verification Engineer
European Recruitment
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Canada
... Highly skilled in Verilog, SystemVerilog, other hardware description languages, and scripting languages. Significant experience with OVM/UVM methodologies. Familiarity with constrained random verification techniques, assertions and functional ... - Apr 24
Senior Design Verification Engineer
Tessolve
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Austin, TX, 78716
... The ideal candidate will have a strong background in SOC level design verification, proficient in System Verilog and UVM methodologies, and possess a deep understanding of the full verification flow including coverage closure. Additionally, ... - Apr 20
Hardware Design Engineer
Sedaa Corp
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San Jose, CA
... Desired Qualifications: Verilog Perl Scripting CAD Tools Job title - Lab Hardware Engineer (Lab Work) Location - San Jose (onsite) The position involves candidate working in Client's Lab, participation and contribution in all phases of hardware ... - Apr 30
Sr. Staff PMIC Design Engineer Data Center Infrastructure Products
Jobot
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Atlanta, GA
... · Proficiency with Spectre and other analog simulators · Knowledge of Verilog, Verilog-ams or other modeling / coding languages, as well as revision control tools such as SOS or SVN · Bonus points for experience with small geometry BCD processes - May 02
Design Verification Engineer
Mastech Digital
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Austin, TX, 78716
... • Proficient in System Verilog/UVM/OVM, OOP/C++ • Knowledge of GPU, experience with Shader, Texture, or Memory System a plus • Experience with code coverage and functional coverage driven verification methodology. • Experience in creating, running ... - Apr 28
FPGA Engineer-High Frequency Trading
CPS, Inc.
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Chicago, IL, 60606
... - Experience coding in VHDL/ Verilog/ SystemVerilog as well as C or C++ - Experience with RTL synthesis, and other constraints - Experience with debugging is a plus #LI-SN1 - Apr 22
ASIC Design Engineer / ASIC design / RTL logic design
European Recruitment
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Ahuntsic, QC, H2C 2M9, Canada
Digital ASIC Design Engineer - RTL / ASIC Syntheses / DfT insertion / Verilog / SystemVerilog Would you like to move to Canada? Ideally, you should have a minimum of 8+ years of relevant experience in Digital ASIC design and are willing to move to ... - May 09
Hardware Engineer - VHDL/Verilog
Antal Internationaal
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Bengaluru, Karnataka, India
... Familiarity with hardware description languages (HDLs) such as VHDL or Verilog. 5. Controller Systems: Designing and integrating microcontrollers and other control systems into hardware designs. Developing firmware/software for control interfaces ... - May 07
Senior ASIC Verification Engineer
European Recruitment
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Ottawa, ON, Canada
... Highly skilled in Verilog, SystemVerilog, other hardware description languages, and scripting languages. Significant experience with OVM/UVM methodologies. Familiarity with constrained random verification techniques, assertions and functional ... - May 09