Niobium
–
Dublin, OH, 43016
... SystemVerilog, Universal Verification Methodology (UVM), and/or SystemVerilog Assertions (SVA) Bonus Skills: RTL Design using Chisel, VHDL, and/or SystemVerilog Experience with RISC-V architecture, AXI, AMBA, and TileLink PCB and/or Package Design ... - Apr 20